Cypress Semiconductor /psoc63 /USBFS0 /USBHOST /HOST_EP2_STATUS

These bits indicate the number of data bytes written to the receive buffer when IN packet transfer of EP2 has finished. The indication range is from 0x000 to 0x40. Note :

• These bits are set to the data size transferred in the IN direction and written to the buffer. Therefore, a value read during transfer in the OUT direction has no effect.

This bit shows that there is valid data in the EP2 buffer. ‘0’ : Invalid data in the buffer ‘1’ : Valid data in the buffer

This bit shows that EP2 is initialized. If the BFINI bit of the Host Endpoint 2 Control Register (HOST_EP2_CTL) is set to ‘1’ and EP2 is initialized, this bit is to ‘1’. ‘0’ : Release of the initialization ‘1’ : Initialization Note:

• This bit isn’t set to ‘0’ or ‘1’ immediately evne if BFINI bit of the Host Endpoint 2 Control Register (HOST_EP2_CTL) is set to ‘0’ or ‘1’.

N/A